Coenrad Fourie, Pr Eng
Professor
Department of Electrical and Electronic Engineering
Stellenbosch University
Publications

Journal papers

Book Chapters

Conference papers

Patents

Selected recent conference posters

 

 

Coenrad Fourie research outputs (CV style)

Journal Papers

  1. C. Kwisanga, and C. J. Fourie, "Three-dimensional modelling of electromagnetic wave propagation in the uniform earth-ionosphere cavity using a commercial FDTD software package," IEEE Trans. Antennas Propag., in print.

  2. S. Nazar Shahsavani, T.-R. Lin, A. Shafaei, C. J. Fourie, and M. Pedram, "An integrated row-based cell placement and interconnect synthesis tool for large SQF logic circuits," IEEE Trans. Appl. Supercond., vol. 27, 1302008, Jun. 2017.

  3. R. S. Bakolo, J. A. Delport, P. Febvre, and C. J. Fourie, "Analysis of a shielding approach for magnetic field tolerant SFQ circuits," IEEE Trans. Appl. Supercond., vol. 27, 1301305, Jun. 2017.

  4. C. J. Fourie, C. Shawawreh, I. V. Vernik, and T. V. Filippov, "High accuracy InductEx calibration sets for MIT-LL SFQ4ee and SFQ5ee processes," IEEE Trans. Appl. Supercond., vol. 27, 1300805, 2017.

  5. R. van Staden, K. Jackman, C. J. Fourie, and P. Febvre, "Influence of the superconducting ground plane on the performance of RSFQ cells," IEEE Trans. Appl. Supercond., vol. 27, 1300704, Jun. 2017.

  6. K. Jackman, and C. J. Fourie, "Flux trapping analysis in superconducting circuits," IEEE Trans. Appl. Supercond., vol. 27, 1300105, Jun. 2017.

  7. M. N. Muchuka, J. A. Delport, and C. J. Fourie, "Superconducting digital circuit design with an open source and freeware tool chain," IEEE Trans. Appl. Supercond., vol. 26, 1302008, 2016.

  8. R. S. Bakolo, R. van Staden, P. Febvre, and C. J. Fourie, "Modelling magnetic fields and shielding efficiency in superconductive integrated circuits," J. Supercond. Nov. Magn., DOI: 10.1007/s10948-016-3806-6, 22 Sept. 2016.

  9. K. Jackman, and C. J. Fourie, "Tetrahedral Modelling Method for Inductance Extraction of Complex 3D Superconducting Structures," IEEE Trans. Appl. Supercond., vol. 26, 0602305, April 2016.

  10. C. Fourie, N. Takeuchi, and N. Yoshikawa, "Inductance and current distribution extraction in Nb multilayer circuits with superconductive and resistive components," IEICE Trans. Electron., vol. E99-C, no. 6, pp. 683-691, Jun. 2016.

  11. C. J. Fourie, X. Peng, R. Numaguchi and N. Yoshikawa, "Inductance and coupling of stacked vias in a multilayer superconductive IC process," IEEE Trans. Appl. Supercond., vol. 25, no. 3, 1101104, Jun. 2015.

  12. R. M. C. Roberts and C. J. Fourie, "Layout-versus-schematic verification fo superconductive integrated circuits,"IEEE Trans. Appl. Supercond., vol. 25, no. 3, 1200105, Jun. 2015.

  13. C. J. Fourie, A. Takahashi and N. Yoshikawa, "Fast and accurate inductance and coupling calculation for a multi-layer Nb process," Supercond. Sci. Technol., vol. 28, 035013, March 2015.

  14. C. J. Fourie, “Full-gate verification of superconductive integrated circuit layouts with InductEx,” IEEE Trans. Appl. Supercond., vol. 25, no. 1, 1300209, Feb. 2015.

  15. I. V. Vernik, S. Kaplan, M. H. Volkmann, A. Dotsenko, C. J. Fourie and O. A. Mukhanov, "Design and test of asynchronous eSFQ circuits," Superconductor Science and Technology, vol. 27, 044030, 2014.

  16. L. C. Müller and C. J. Fourie, "Automated state machine and timing characteristic extraction for RSFQ circuits," IEEE Trans. Appl. Supercond., vol. 24, no. 1, 1300110, Feb. 2014.

  17. R. S. Bakolo and C. J. Fourie, "New implementation of RSFQ superconductive digital gates," SAIEE Africa Res. J., vol. 104, pp. 90-96, Sept. 2013.

  18. S. M. Anton, I. A. B. Sognnaes, J. S. Birenbaum, S. R. O'Kelley, C. J. Fourie and J. Clarke, "Mean square flux noise in SQUIDs and qubits: numerical calculations," Superconductor Science and Technology, vol. 26, 075022, Jul. 2013.

  19. M. H. Volkmann, A. Sahu, C. J. Fourie and O. Mukhanov, "Experimental investigation of energy-efficient digital circuits based on eSFQ logic," IEEE Trans. Appl. Supercond., vol. 23, no. 3, 1301505, Jun. 2013.

  20. T. Wolf, N. Bergeal, J. Lesueur, C. J. Fourie, G. Faini, C. Ulysse and P. Febvre, "YBCO Josephson junctions and striplines for RSFQ circuits made by ion irradiation," IEEE Trans. Appl. Supercond., vol. 23, no. 2, 1101205, Apr. 2013.

  21. C. J. Fourie, “Calibration of inductance calculations to measurement data for superconductive integrated circuit processes,” IEEE Trans. Appl. Supercond., vol. 23, no. 3, 1301305, Jun. 2013.

  22. C. J. Fourie, O. Wetzstein, J. Kunert and H.-G. Meyer, “SFQ circuits with ground plane hole-assisted inductive coupling designed with InductEx,” IEEE Trans. Appl. Supercond., vol. 23, no. 3, 1300705, Jun. 2013.

  23. C. J. Fourie and M. H. Volkmann, “Status of superconductor electronic circuit design software,” IEEE Transactions on Applied Superconductivity, vol. 23, no. 3, 1300205, Jun. 2013.

  24. C. J. Fourie, O. Wetzstein, J. Kunert, H. Toepfer and H.-G. Meyer, “Experimentally verified inductance extraction and parameter study for superconductive integrated circuit wires crossing ground plane holes,” Superconductor Science and Technology, vol. 26, 015016, Jan. 2013.

  25. M. H. Volkmann, A. Sahu, C. J. Fourie and O. A. Mukhanov, “Implementation of energy efficient Single Flux Quantum digital circuits with sub-aJ/bit operation,” Superconductor Science and Technology, vol. 26, 015002, Jan. 2013.

  26. C. J. Fourie, O. Wetzstein, T. Ortlepp and J. Kunert, "Three-dimensional multi-terminal superconductive integrated circuit inductance extraction," Superconductor Science and Technology, vol. 24, 125015, December 2011.

  27. F. G. Ortmann, A. van der Merwe, H. R. Gerber and C. J. Fourie, "A comparison of multi-criteria evaluation methods for RSFQ circuit optimization," IEEE Transactions on Applied Superconductivity, vol. 21, no. 3, pp. 801-804, June 2011.

  28. P. C. van Niekerk and C. J. Fourie, "Cryogenic CMOS-based control system for superconductor electronics," SAIEE Africa Research Journal, vol. 99, no. 2, pp. 43-48, June 2008.

  29. I. Volkov, M. Chukharkin, O. Snigirev, A. Volkov, S. Tanaka and C. J. Fourie, "Determination of the anisotropy constant and saturation magnetization of magnetic nanoparticles from relaxation curves," Journal of Nanoparticle Research, Springer, August 2007.

  30. C. J. Fourie and H. van Heerden, "An RSFQ Superconductive Programmable Gate Array," IEEE Transactions on Applied Superconductivity, vol. 17, no. 2, pp. 538-541, June 2007.

  31. H. R. Gerber, C. J. Fourie, W. J. Perold and L. C. Müller, "Design of an asynchronous microprocessor using RSFQ-AT," IEEE Transactions on Applied Superconductivity, vol. 17, no. 2, pp. 490-493, June 2007.

  32. H. R. Gerber, C. J. Fourie and W. J. Perold, "Optimised asynchronous timing for superconductive digital circuits," SAIEE Africa Research Journal, vol. 97, no. 3, pp. 255-260, September 2006.

  33. C. J. Fourie and W. J. Perold, "A Single-Clock Asynchronous Input COSL Set-Reset Flip-Flop and SFQ to Voltage State Interface," IEEE Transactions on Applied Superconductivity, vol. 15, no. 2, pp. 263-266, June 2005.

  34. C. J. Fourie, W. J. Perold and H. R. Gerber, "Complete Monte Carlo Model Descrition of Lumped-Element RSFQ Logic Circuits," IEEE Transactions on Applied Superconductivity, vol. 15, no. 2, pp. 380-383, June 2005.

  35. C. J. Fourie and W. J. Perold, "Simulated Inductance Variations in RSFQ Circuit Structures," IEEE Transactions on Applied Superconductivity, vol. 15, no. 2, pp. 300-303, June 2005.

  36. C. J. Fourie and W. J. Perold, "An RSFQ DC-Resettable Latch for building Memory and Reprogrammable Circuits," IEEE Transactions on Applied Superconductivity, vol. 15, no. 2, pp. 348-351, June 2005.

  37. H. R. Gerber, C. J. Fourie and W. J. Perold, "Specification of a Technology Portable Logic Cell Library for RSFQ: An Automated Approach," IEEE Transactions on Applied Superconductivity, vol. 15, no. 2, pp. 368-371, June 2005.

  38. H. R. Gerber, C. J. Fourie and W. J. Perold, "RSFQ-Asynchronous Timing (RSFQ-AT): A New Design Methodology for Implementation in CAD Automation," IEEE Transactions on Applied Superconductivity, vol. 15, no. 2, pp. 272-275, June 2005.

  39. C. J. Fourie and W. J. Perold, "Reflection plane placement in numerical inductance calculations using the method of images for thin-film superconducting structures," SAIEE Transactions, vol. 94, no. 2, July 2003.

  40. C. J. Fourie and W. J. Perold, "Yield optimization of high frequency superconducting digital circuits with genetic algorithms," SAIEE Transactions, vol. 94, no. 2, July 2003.

  41. C. J. Fourie and W. J. Perold, "Comparison of Genetic Algorithms to Other Optimization Techniques for Raising Circuit Yield in Superconducting Digital Circuits," IEEE Transactions on Applied Superconductivity, vol. 13, no. 2, pp. 511-514, June 2003.

  42. C. J. Fourie and W. J. Perold, "On Using Finite Segment Methods and Images to Establish the Effect of Gate Structures on Inter-junction Inductances in RSFQ Circuits," IEEE Transactions on Applied Superconductivity, vol. 13, no. 2, pp. 539-542, June 2003.

  43. W. J. Perold and C. J. Fourie, "Modeling superconducting components based on the fabrication process and layout dimensions," IEEE Transactions on Applied Superconductivity, vol. 11, no. 1, pp. 345-348, March 2001.

 

Book Chapters

  1. C. Fourie, “Superconducting electronics,” Wiley Encyclopaedia of Electrical and Electronics Engineering, pp. 1-18, 15 Dec. 2015. DOI: 10.1002/047134608X.W3171.pub2

 

Selected Papers published in Conference Proceedings

  1. C. J. Fourie, S. Miyanishi and N. Yoshikawa, "Grounding methods to reduce stray coupling in mult-layer layouts," in Ext. Abs. 15th Int. Supercon. Elec. Conf. (ISEC ’15), Nagoya, Japan, in print.

  2. K. Jackman and C. J. Fourie, "Fast Multicore Fasthenry and a Tetrahedral modeling method for inductance extraction of complex 3D geometries," in Ext. Abs. 15th Int. Supercon. Elec. Conf. (ISEC ’15), Nagoya, Japan, in print.

  3. R. M. C. Roberts and C. J. Fourie, “Layout-to-schematic extraction as a tool to be used in layout versus schematic verification of RSFQ circuits,” in Proc. IEEE AFRICON 2013, Mauritius, pp. 898-902.

  4. L. J. Janse van Vuuren, A. Kilian, T.-J. Phiri, C. J. Fourie, E. Pozzo di Borgo, P. Febvre, E. F. Saunderson, E. T. Lochner and D. J. Gouws, “Implementation of an unshielded SQUID as a geomagnetic sensor,” in Proc. IEEE AFRICON 2013, Mauritius, pp. 908-912.

  5. C. J. Fourie, X. Peng, A. Takahashi and N. Yoshikawa, “Modelling and calibration of ADP process for inductance calculation with InductEx,” in Ext. Abs. 14th Int. Supercon. Elec. Conf. (ISEC ’13), Cambridge, MA, pp. 49-51.

  6. C. J. Fourie, S. M. Anton and J. Clarke, “Magnetic field calculations in the vicinity of superconductive circuit structures,” in Ext. Abs. 14th Int. Supercon. Elec. Conf. (ISEC ’13), Cambridge, MA, pp. 258-260.

  7. R. Collot, P. Febvre, J.-L. Issler, T. Robert, C. J. Fourie, J. Kunert, R. Stolz and H.-G. Meyer, “Influence of external magnetic fields on the inductive properties of rapid single-flux-quantum digital circuits,” in Ext. Abs. 14th Int. Supercon. Elec. Conf. (ISEC ’13), Cambridge, MA, pp. 42-44.

  8. R. S. Bakolo and C. J. Fourie, “Development of a RSFQ cell library for the University of Stellenbosch,” IEEE Africon 2011, in Proc. IEEE AFRICON 2011, Livingstone, pp. 1-5.

  9. L. C. Müller, H. R. Gerber and C. J. Fourie, “Review and comparison of RSFQ asynchronous methodologies,” J. Phys. Conf. Ser., vol. 97, 2008.

 

 

Patents

  1. C. J. Fourie, "Device for displaying electricity consumption," PCT/IB2010/000524.

 

Selected recent conference posters

  ISEC 2015Grounding Methods to Reduce Stray Coupling in Multilayer Processes

ASC 2014
Inductance of stacked vias in multilayer process

ASC 2014Parallel processing speedup of FastHenry
ISEC 2013
Magnetic field calculations near SC structures
ISEC 2013Modelling the ADP planarized process for inductance calculation

IEEE ASC 2012SFQ circuits with GP holes designed with InductEx

IEEE ASC 2012Inductance Extraction Calibration

IEEE ASC 2012Gray-Zone of CQOS Comparators

IEEE ASC 2012Poster Inductance Extraction

IEEE ASC 2012Poster NJJ inductance

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